* Add build-time U-Boot option CONFIG_KINETIS_120MHZ or
CONFIG_KINETIS_150MHZ to define the maximum core clock rate of the MCU.
 * Use different PLL configurations to reach to maximum clock rates and
performance.
 * Use different LPDDR timings depending on the clock rate.
 * Use different clock dividers for internal flash and external NAND
flash, as required by the respective datasheets.