Commit 16258d8a authored by Sergei Poselenov's avatar Sergei Poselenov
Browse files

RT #62660. Further cleanup.

parent c02cedcf
......@@ -3,7 +3,8 @@
*
* Board specific code the the Emcraft A2F-LNX-EVB board.
*
* Copyright (C) 2010 Vladimir Khusainov, Emcraft Systems
* Copyright (C) 2010, 2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
......
#
# (C) Copyright 2006 - 2008
# Texas Instruments, <www.ti.com>
#
# EVM uses OMAP3 (ARM-CortexA8) cpu
# see http://www.ti.com/ for more information on Texas Instruments
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# Physical Address:
# 8000'0000 (bank0)
# A000/0000 (bank1)
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
# For use with external or internal boots.
# TEXT_BASE = 0x80e80000
......@@ -2,6 +2,7 @@
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2010,2011
# Port to A2F
# Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com.
#
......
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
# (C) Copyright 2010,2011
# Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
#
# See file CREDITS for list of people who contributed to this
# project.
......
......@@ -30,14 +30,6 @@ DECLARE_GLOBAL_DATA_PTR;
*/
int arch_cpu_init(void)
{
/*
* Initialize timer
* TO-DO: move this somewhere else
*/
A2F_SYSREG->soft_rst_cr &= ~(1 << 6);
A2F_TIMER->timer64_mode = 0;
A2F_TIMER->timer1_ctrl = 0x03;
/*
* Initialize the eNVM driver
*/
......@@ -69,7 +61,7 @@ int arch_cpu_init(void)
int print_cpuinfo(void)
{
printf("CPU: %s\n", "SmartFusion FPGA (Cortex-M3 Hard IP)");
return 0;
return 0;
}
/*
......@@ -89,6 +81,7 @@ void reset_cpu(ulong addr)
/*
* Perform reset but keep priority group unchanged.
*/
A2F_SCB->aircr = (0x5FA << 16) |
(A2F_SCB->aircr & (7<<8)) |
(1<<2);
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* Code cleanup
* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com
*
* This program is free software; you can redistribute it and/or
......@@ -23,42 +21,49 @@
#include <common.h>
struct systick {
uint32_t ctrl; /* SysTick Control and Status Register */
uint32_t load; /* SysTick Reload Value Register */
uint32_t val; /* SysTick Current Value Register */
uint32_t cal; /* SysTick Calibration Register */
uint32_t ctrl; /* Control and Status Register */
uint32_t load; /* Reload Value Register */
uint32_t val; /* Current Value Register */
uint32_t cal; /* Calibration Register */
};
/* system core clock /32 */
#define CONFIG_SYSTICK_FREQ 3125000
/* SysTick Base Address */
#define A2F_SYSTICK_BASE (A2F_SCS_BASE + 0x0010)
#define A2F_SYSTICK ((volatile struct systick *)(A2F_SYSTICK_BASE))
/* SysTick LOAD: RELOAD Position */
#define SYSTICK_LOAD_RELOAD_POS 0
/* SysTick CTRL: ENABLE Position */
#define SYSTICK_CTRL_ENABLE_POS 0
/* SysTick LOAD: RELOAD Mask */
#define SYSTICK_LOAD_RELOAD_MSK (0xFFFFFFul << SYSTICK_LOAD_RELOAD_POS)
/* SysTick CTRL: ENABLE Mask */
#define SYSTICK_CTRL_ENABLE_MSK (1ul << SYSTICK_CTRL_ENABLE_POS)
#define A2F_SYSTICK_BASE (A2F_SCS_BASE + 0x0010)
#define A2F_SYSTICK ((volatile struct systick *)(A2F_SYSTICK_BASE))
#define SYSTICK_LOAD_RELOAD_POS 0
#define SYSTICK_CTRL_ENABLE_POS 0
#define SYSTICK_LOAD_RELOAD_MSK (0xFFFFFFul << SYSTICK_LOAD_RELOAD_POS)
#define SYSTICK_CTRL_ENABLE_MSK (1ul << SYSTICK_CTRL_ENABLE_POS)
/* Internal tick units */
static unsigned long long timestamp; /* Monotonic incrementing timer */
static unsigned long lastdec; /* Last decremneter snapshot */
static unsigned long lastdec; /* Last decremneter snapshot */
int timer_init()
{
A2F_SYSREG->systick_cr &= ~(1<<25); /* en noref */
A2F_SYSREG->systick_cr |= (3 << 28); /* div by 32 */
A2F_SYSREG->systick_cr &= ~0xffffff;
A2F_SYSREG->systick_cr |= 0x7a12;
A2F_SYSTICK->load = SYSTICK_LOAD_RELOAD_MSK - 1;
A2F_SYSTICK->val = 0;
/* we don't want ints to be enabled */
A2F_SYSTICK->ctrl = SYSTICK_CTRL_ENABLE_MSK;
timestamp = 0;
return 0;
/*
* Initialize timer
*/
A2F_SYSREG->soft_rst_cr &= ~(1 << 6); /* Release systimer from reset */
A2F_TIMER->timer64_mode = 0; /* enable 32bit timer1 */
A2F_TIMER->timer1_ctrl = 0x03; /* timer1 is used by envm driver */
A2F_SYSREG->systick_cr &= ~(1 << 25); /* en noref */
A2F_SYSREG->systick_cr |= (3 << 28); /* div by 32 */
A2F_SYSREG->systick_cr &= ~0xffffff;
A2F_SYSREG->systick_cr |= 0x7a12;
A2F_SYSTICK->load = SYSTICK_LOAD_RELOAD_MSK - 1;
A2F_SYSTICK->val = 0;
/* we don't want ints to be enabled */
A2F_SYSTICK->ctrl = SYSTICK_CTRL_ENABLE_MSK;
timestamp = 0;
return 0;
}
unsigned long get_timer(unsigned long base)
......@@ -77,8 +82,8 @@ unsigned long get_timer(unsigned long base)
void reset_timer(void)
{
lastdec = A2F_SYSTICK->val;
timestamp = 0;
lastdec = A2F_SYSTICK->val;
timestamp = 0;
}
/* delay x useconds */
......@@ -92,12 +97,12 @@ void __udelay(unsigned long usec)
tmp = A2F_SYSTICK->val;
if (tmp < clc) {
/* loop till event */
/* loop till event */
while (A2F_SYSTICK->val < tmp ||
A2F_SYSTICK->val > (SYSTICK_LOAD_RELOAD_MSK - 1 - clc + tmp))
; /* nop */
A2F_SYSTICK->val > (SYSTICK_LOAD_RELOAD_MSK - 1 -
clc + tmp)) ; /* nop */
} else {
while (A2F_SYSTICK->val > (tmp - clc));
while (A2F_SYSTICK->val > (tmp - clc)) ;
}
}
......
......@@ -85,6 +85,8 @@
#define CONFIG_SYS_ACE_PCLK1 (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_SYS_FPGA_PCLK1 (CONFIG_SYS_CLK_FREQ / 2)
#define CONFIG_SYS_HZ 1000
/*
* Enable/disable h/w watchdog
*/
......@@ -195,15 +197,19 @@
#define CONFIG_BITBANGMII 1
#define CONFIG_BITBANGMII_MULTI 1
#define CONFIG_SYS_LOAD_ADDR 0
#define CONFIG_SYS_MEMTEST_START 0
#define CONFIG_SYS_MEMTEST_END 0
#define CONFIG_SYS_HZ 1000
/* system core clock /32 */
#define CONFIG_SYSTICK_FREQ 3125000
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_RAM_BASE + \
CONFIG_SYS_RAM_SIZE - 0x100000)
/* Need ot be defined for "loadb" */
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_MONITOR_BASE 0x0
#define CONFIG_MONITOR_IS_IN_RAM 1
/*
* Monitor is in NVM. For U-Boot, it is not flash,
* neither RAM, so we configure it as follows.
*/
#define CONFIG_SYS_MONITOR_BASE 0x0
#define CONFIG_MONITOR_IS_IN_RAM 1
/*
* Enable all those monitor commands that are needed
......@@ -222,7 +228,7 @@
#define CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_XIMG
/*
* To save memory disable long help
......
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