RT81519. lpc178x: Move MPU initialization to new function cortex_m3_mpu_full_access()

We will reuse this function on SmartFusion2 (M2S).

cpu/arm_cortexm3/cpu.c

@@ -179,3 +179,15 @@ void cortex_m3_mpu_enable(int enable)
 	CM3_MPU_REGS->ctrl =
 		enable ? (CM3_MPU_CTRL_EN_MSK | CM3_MPU_CTRL_HFNMI_EN_MSK) : 0;
 }
+
+/*
+ * Configure the memory protection unit (MPU) to allow full access to
+ * the whole 4GB address space.
+ */
+void cortex_m3_mpu_full_access(void)
+{
+	cortex_m3_mpu_add_region(0, 0x00000000,
+		CM3_MPU_RASR_AP_RW_RW | CM3_MPU_RASR_SIZE_4GB |
+		CM3_MPU_RASR_EN);
+	cortex_m3_mpu_enable(1);
+}

cpu/arm_cortexm3/lpc178x/soc.c

@@ -63,9 +63,6 @@ void cortex_m3_soc_init(void)
 	 * execution is not permitted at the addresses above 0xA0000000
 	 * (including SDRAM.)
 	 */
-	cortex_m3_mpu_add_region(0, 0x00000000,
-		CM3_MPU_RASR_AP_RW_RW | CM3_MPU_RASR_SIZE_4GB |
-		CM3_MPU_RASR_EN);
-	cortex_m3_mpu_enable(1);
+	cortex_m3_mpu_full_access();
 }
 #endif

include/asm-arm/arch-cortexm3/hardware.h

@@ -107,5 +107,6 @@ u8 cortex_m3_irq_vec_get(void);
 
 void cortex_m3_mpu_add_region(u32 region, u32 address, u32 attr);
 void cortex_m3_mpu_enable(int enable);
+void cortex_m3_mpu_full_access(void);
 
 #endif