Commit 46fd9f61 authored by Yuri Tikhonov's avatar Yuri Tikhonov
Browse files

RT72064. cortex-m3: print-out frequencies in U-Boot banner



E.g.:
"
 U-Boot 2010.03-00020-gef3a000 (Sep 25 2011 - 16:21:34)

 CPU  : STM32 F2 series (Cortex-M3)
 Freqs: SYSCLK=120MHz,HCLK=120MHz,PCLK1=30MHz,PCLK2=60MHz
 Board: STM3220G-EVAL board 1
 DRAM:   0 kB
 Using default environment
 ...
"
Signed-off-by: default avatarYuri Tikhonov <yur@emcraft.com>
parent 4cae92da
......@@ -28,13 +28,19 @@
*/
int print_cpuinfo(void)
{
printf("CPU: %s\n", "SmartFusion FPGA (Cortex-M3 Hard IP)");
#if defined(DEBUG)
printf("Frequencies: FCLK=%d, PCLK0=%d, PCLK1=%d, ACE=%d, FPGA=%d\n",
clock_get(CLOCK_FCLK), clock_get(CLOCK_PCLK0),
clock_get(CLOCK_PCLK1), clock_get(CLOCK_ACE),
clock_get(CLOCK_FPGA));
#endif
char buf[5][32];
printf("CPU : %s\n", "SmartFusion FPGA (Cortex-M3 Hard IP)");
strmhz(buf[0], clock_get(CLOCK_FCLK));
strmhz(buf[1], clock_get(CLOCK_PCLK0));
strmhz(buf[2], clock_get(CLOCK_PCLK1));
strmhz(buf[3], clock_get(CLOCK_ACE));
strmhz(buf[4], clock_get(CLOCK_FPGA));
printf("Freqs: FCLK=%sMHz,PCLK0=%sMHz,PCLK1=%sMHz,ACE=%sMHz,"
"FPGA=%sMHz\n",
buf[0], buf[1], buf[2], buf[3], buf[4]);
return 0;
}
......
......@@ -20,6 +20,7 @@
*/
#include <common.h>
#include <asm/arch/stm32f2.h>
#include "clock.h"
......@@ -28,13 +29,16 @@
*/
int print_cpuinfo(void)
{
printf("CPU: %s\n", "STM32 F2 series (Cortex-M3)");
char buf[4][32];
printf("CPU : %s\n", "STM32 F2 series (Cortex-M3)");
#if defined(DEBUG)
printf("Frequencies: SYSCLK=%d, HCLK=%d, PCLK1=%d, PCLK2=%d\n",
clock_get(CLOCK_SYSCLK), clock_get(CLOCK_HCLK),
clock_get(CLOCK_PCLK1), clock_get(CLOCK_PCLK2));
#endif
strmhz(buf[0], clock_get(CLOCK_SYSCLK));
strmhz(buf[1], clock_get(CLOCK_HCLK));
strmhz(buf[2], clock_get(CLOCK_PCLK1));
strmhz(buf[3], clock_get(CLOCK_PCLK2));
printf("Freqs: SYSCLK=%sMHz,HCLK=%sMHz,PCLK1=%sMHz,PCLK2=%sMHz\n",
buf[0], buf[1], buf[2], buf[3]);
return 0;
}
......
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