Commit 5d52a173 authored by Alexander Potashev's avatar Alexander Potashev

RT74765. twr-k60n512: disable the watchdog, it is enabled on reset

If we do not disable the watchdog timer in a few MCU clocks after reset,
it will reset the MCU.
parent b7cb4c3a
......@@ -23,6 +23,43 @@
#include "wdt.h"
/*
* Watchdog Status and Control Register High (STCTRLH) register bits
*/
#define KINETIS_WDT_STCTRLH_WDOGEN_MSK (1 << 0)
/*
* Unlock sequence for writing into the UNLOCK register of the Watchdog Timer
* in order to unlock its configuration registers.
*/
#define KINETIS_WDT_UNLOCK_KEY1 0xC520
#define KINETIS_WDT_UNLOCK_KEY2 0xD928
/*
* Watchdog timer (WDOG) register map
*/
struct kinetis_wdt_regs {
u16 stctrlh; /* Status and Control Register High */
u16 stctrll; /* Status and Control Register Low */
u16 tovalh; /* Time-out Value Register High */
u16 tovall; /* Time-out Value Register Low */
u16 winh; /* Window Register High */
u16 winl; /* Window Register Low */
u16 refresh; /* Refresh Register */
u16 unlock; /* Unlock Register */
u16 tmrouth; /* Timer Output Register High */
u16 tmroutl; /* Timer Output Register Low */
u16 rstcnt; /* Reset Count Register */
u16 presc; /* Prescaler Register */
};
/*
* Watchdog Timer registers base
*/
#define KINETIS_WDT_BASE (KINETIS_AIPS0PERIPH_BASE + 0x00052000)
#define KINETIS_WDT ((volatile struct kinetis_wdt_regs *) \
KINETIS_WDT_BASE)
/*
* Strobe the WDT.
*/
......@@ -35,16 +72,27 @@ void wdt_strobe(void)
return;
}
/*
* Unlock the write once registers in the watchdog so they are writable
* within the WCT (watchdog configuration time) period.
*/
static void wdt_unlock(void)
{
KINETIS_WDT->unlock = KINETIS_WDT_UNLOCK_KEY1;
KINETIS_WDT->unlock = KINETIS_WDT_UNLOCK_KEY2;
}
/*
* Disable the WDT.
*/
void wdt_disable(void)
{
wdt_unlock();
/*
* TBD
* Disable watchdog operation
*/
return;
KINETIS_WDT->stctrlh &= ~KINETIS_WDT_STCTRLH_WDOGEN_MSK;
}
/*
......
......@@ -25,6 +25,24 @@
#ifndef _MACH_KINETIS_H_
#define _MACH_KINETIS_H_
#include <asm/byteorder.h>
/*
* This Kinetis port assumes that the CPU works in little-endian mode.
* Switching to big-endian will require different bit offsets in peripheral
* devices' registers. Also, some bit groups may lay on byte edges, so issue
* with big-endian cannot be fixed only by defining bit offsets differently
* for the big-endian mode.
*/
#ifndef __LITTLE_ENDIAN
#error This Kinetis port assumes that the CPU works in little-endian mode
#endif
/*
* Peripheral memory map
*/
#define KINETIS_AIPS0PERIPH_BASE 0x40000000
/*
* Clocks enumeration
*/
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment