Commit 99f0ddb1 authored by Vladimir Khusainov's avatar Vladimir Khusainov
Browse files

RT80404 Removed the "reset SF2" workaround. This is no longer needed now

that the hardware starts up correctly on reset / power-on.
parent be9f3c8b
......@@ -29,10 +29,9 @@
#include <asm/arch/ddr.h>
/*
* TBD: move to config or convert at run-time?
* Generate DDR timings depending on the following DDR clock
*/
#define M2S_DDR_MHZ 160
#define M2S_DDR_MHZ (CONFIG_SYS_M2S_SYSREF / (1000 * 1000))
/*
* Common conversion macros used for DDR cfg
......
......@@ -32,16 +32,6 @@ static unsigned long clock[CLOCK_END];
*/
static void clock_mss_init(void)
{
/*
* Check if PERSIST_CC is set. If it is, it means that
* FACC is in reset and its registers hasn't initialized yet.
* The workaround is to de-assert the reset and perform
* the software reset making FACC initialize properly.
*/
if (M2S_SYSREG->mssddr_facc1_cr & (1<<25)) {
M2S_SYSREG->mssddr_facc1_cr &= ~(1<<25);
reset_cpu(0);
}
/*
* Analog voltage = 3.3v. Libero appears to ignore this
......
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