Commit 9c564b5e authored by Vladimir Khusainov's avatar Vladimir Khusainov
Browse files

RT62660: Clean-up U-boot for the first release of the eval kit.

Added a2f.h (definition of the SYSREG region and a couple of related
updates.
parent ecf8decb
/*
* (C) Copyright 2004-2008
* Texas Instruments, <www.ti.com>
* board/emcraft/a2f-lnx-evb/board.c
*
* Author :
* Manikandan Pillai <mani.pillai@ti.com>
* Board specific code the the Emcraft A2F-LNX-EVB board.
*
* Derived from Beagle Board and 3430 SDP code by
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
* Copyright (C) 2010 Vladimir Khusainov, Emcraft Systems
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
......@@ -27,47 +20,38 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm-arm/arch-a2f/a2f.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
return 0;
}
/*
* Routine: misc_init_r
* Description: Init ethernet (done here so udelay works)
*/
int misc_init_r(void)
int dram_init (void)
{
#if ( CONFIG_NR_DRAM_BANKS > 0 )
/*
* EMC timing parameters for chip select 0
*/
A2F_SYSREG->emc_cs_0_cr = CONFIG_SYS_EMC0CS0CR;
return 0;
}
/*
* Routine: set_muxconf_regs
* Description: Setting up the configuration Mux registers specific to the
* hardware. Many pins need to be moved from protect to primary
* mode.
*/
void set_muxconf_regs(void)
{
gd->bd->bi_dram[0].start = EXT_RAM_BASE;
gd->bd->bi_dram[0].size = EXT_RAM_SIZE;
#endif
return 0;
}
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
* Ethernet hardware.
*/
static void setup_net_chip(void)
int misc_init_r(void)
{
return 0;
}
int board_eth_init(bd_t *bis)
......
#include <common.h>
#include <command.h>
#include <asm-arm/arch-a2f/a2f.h>
#include "my_uart.h"
#include "my_lib.h"
#include "nvm.h"
......@@ -31,7 +33,14 @@ int arch_cpu_init(void)
*/
my_uart_init(115200);
SYSREG->EMC_CS_1_CR = CONFIG_SYS_EMC0CS1CR;
/*
* External memory controller MUX configuration
* The EMC _SEL bit in the EMC_MUX_CR register is used
* to select either FPGA I/O or EMC I/O.
* 1 -> The multiplexed I/Os are allocated to the EMC.
*/
A2F_SYSREG->emc_mux_cr = CONFIG_SYS_EMCMUXCR;
A2F_SYSREG->emc_cs_1_cr = CONFIG_SYS_EMC0CS1CR;
nvm_init();
......@@ -52,29 +61,6 @@ int arch_cpu_init(void)
return 0;
}
int dram_init (void)
{
#if ( CONFIG_NR_DRAM_BANKS > 0 )
/*
* EMC timing parameters for chip select 0
*/
SYSREG->EMC_CS_0_CR = CONFIG_SYS_EMC0CS0CR;
/*
* External memory controller MUX configuration
* The EMC _SEL bit in the EMC_MUX_CR register is used
* to select either FPGA I/O or EMC I/O.
* 1 -> The multiplexed I/Os are allocated to the EMC.
*/
SYSREG->EMC_MUX_CR = CONFIG_SYS_EMCMUXCR;
gd->bd->bi_dram[0].start = EXT_RAM_BASE;
gd->bd->bi_dram[0].size = EXT_RAM_SIZE;
#endif
return 0;
}
int print_cpuinfo(void)
{
return 0;
......
/*
* a2f.h
*
* Copyright (C) 2010 Vladimir Khusainov, Emcraft Systems
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _MACH_A2F_H_
#define _MACH_A2F_H_
struct a2f_sysreg {
unsigned int esram_cr;
unsigned int envm_cr;
unsigned int envm_remap_syscr;
unsigned int envm_remap_fabcr;
unsigned int fab_prot_size_cr;
unsigned int fab_prot_base_cr;
unsigned int ahb_matrix_cr;
unsigned int mss_sr;
unsigned int clr_mss_sr;
unsigned int efrom_cr;
unsigned int iap_cr;
unsigned int soft_irq_cr;
unsigned int soft_rst_cr;
unsigned int device_sr;
unsigned int systick_cr;
unsigned int emc_mux_cr;
unsigned int emc_cs_0_cr;
unsigned int emc_cs_1_cr;
unsigned int mss_clk_cr;
unsigned int mss_ccc_div_cr;
unsigned int mss_ccc_mux_cr;
unsigned int mss_ccc_pll_cr;
unsigned int mss_ccc_dly_cr;
unsigned int mss_ccc_sr;
unsigned int mss_rcosc_cr;
unsigned int vrpsm_cr;
unsigned int reserved1;
unsigned int fab_if_cr;
unsigned int fab_apb_hiword_cr;
unsigned int loopback_cr;
unsigned int mss_io_bank_cr;
unsigned int gpin_source_cr;
unsigned int test_sr;
unsigned int red_rep_addr0;
unsigned int red_rep_low_locs0;
unsigned int red_rep_high_locs0;
unsigned int red_rep_adr1;
unsigned int red_rep_low_locs1;
unsigned int red_rep_high_locs1;
unsigned int fabric_cr;
unsigned int reserved2[24];
unsigned int iomux_cr[83];
};
#define A2F_SYSREG_BASE 0xE0042000
#define A2F_SYSREG ((volatile struct a2f_sysreg *)(A2F_SYSREG_BASE))
struct a2f_scb {
unsigned int cpuid;
unsigned int icst;
unsigned int vtor;
unsigned int aircr;
};
#define A2F_SCB_BASE 0xE000ED00
#define A2F_SCB ((volatile struct a2f_scb *)(A2F_SCB_BASE))
#endif /*_MACH_A2F_H_ */
/*
* End of File
*/
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