1. 24 Feb, 2015 1 commit
  2. 18 Feb, 2015 2 commits
  3. 11 Feb, 2015 1 commit
  4. 09 Feb, 2015 1 commit
    • Yuri Tikhonov's avatar
      RT106081: U-Boot STM32F7: fix-up MPU configuration · 7356326f
      Yuri Tikhonov authored
      In case of disabled DCACHE we previously had the only one 4GB MPU
      region with 'Strongly ordered' mem type. This led to problems with
      strex/ldrex instruction targeted such mem (and thus we couldn't use
      these instructions).
      Now we always create 2 MPU region, even if DCACHE is off. The 2nd
      MPU region is mapped to external SDRAM, and has 'Normal' mem type.
      This patch also changes 'write-through' caching policy to 'write-
      back with write & read allocate'.
      Signed-off-by: default avatarYuri Tikhonov <yur@emcraft.com>
  5. 29 Jan, 2015 2 commits