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Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

RT #84530 Ethernet in Linux for STM-SOM does not come up if no network command is executed in U-boot

This is to avoid slowing things down, when we'll switch to malloc
in external mem.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Supported:
 - UART0 (57600)
 - SPI0 (non-DMA)
 - Ethernet
 - LPDDR
 - Env in SPI Flash

 * Write a custom Ethernet driver for LPC18xx/LPC43xx. We know the
Ethernet module is compatible with STM32F, but we do not want to spend
time right now to merge these drivers.
 * Use Ethernet MII mode.
 * Store Ethernet DMA buffers and buffer descriptors in a free region of
internal SRAM.

* Clone the board-specific files from those used for the STM3220G-EVAL board.
* Change STM3220G-EVAL to STM3240G-EVAL where appropriate.
* cpu/arm_cortexm3/stm32/clock.c: Add support for clock rates up to 168 MHz.
* Ethernet driver: Implement us/ms delays not tied to CPU clock rate.
* Ethernet driver: Add `stm_phy_wait_busy()` to reduce code duplication.
* Raise system clock rate from 120 MHz to 168 MHz.
* Update PSRAM timings.
* Disable the PSRAM Synchronous Burst Mode.

The Ethernet module of the MCU requires that the RDAR register is set
only after a while after the RDSR register is set; i.e. the RDAR
register should not be set immediately after RDSR during initialization
of the Ethernet module.
  1. If we write to the ENET_RDAR register immediately after initializing
the ENET_RDSR register, the incoming packets can _never_ be received.
  2. If we make the MCU wait for 10us before writing to ENET_RDAR, the
incoming packets are _always_ received correctly.
  3. If we perform a few instructions (about 10 of them) between setting
RDSR and RDAR, then the problem manifests randomly from time to time.

In order to fix the bug, we add a 10us delay just before writing
to the RDAR register.

Things just work in Freescale MQX and in Linux, because there is a lot
of other initialization code between the RDAR and RDSR register are set,
so this other initialization code serves as a delay.

The value for the RCR (Receive Control Register) was wrong in the
half-duplex mode.

The `mcf*` targets were not checked for clean build.

The `mcf*` targets were not checked for clean build.

To avoid hang-up of the Ethernet block after Cortex-M3 software reset
(SYSRESET), we need to reset the Ethernet PHY immediately before
performing the SYSRESET.

All new code added in this patch should be in placed in `.ramcode`,
because we might want to do a software reset after self-upgrade.

Since we cannot use `printf()` in functions that may be called during
self-upgrade (`printf()` is too big for `.ramcode`), the
`lpc178x_phy_init()` function cannot be easily used in
`lpc178x_phy_final_reset()`. Because of this, we use a pre-set PHY
address (`CONFIG_LPC178X_ETH_PHY_ADDR`) instead of doing automatic
PHY discovery that is usually done in `lpc178x_phy_init()`.

If Ethernet is not enabled in the U-Boot configuration file, we do not
perform the PHY reset.
This leads to a minor bug: if you install U-Boot without Ethernet
support into your board and do a self-upgrade to another build of
U-Boot with Ethernet support, the Ethernet driver will hang in the
latter U-Boot unless you have done a full reset (by pushing the SW1
button) after self-upgrade.

1. Fixed the algorithm for checking if the transmit buffers are full.
2. Removed unnecessary `udelay()` calls that were kept after copying the
	code from the LPCware's U-Boot port.
3. Increased the numbers of receive and transmit DMA buffers.

* The driver structure is almost the same as in the STM32 Ethernet driver.
* The PHY autodetection code was copied from the STM32 Ethernet driver
    (see `lpc178x_phy_init()`)
* The speed/duplex detection logic grabbed from the Linux kernel
    (see linux/drivers/net/phy/phy_device.c)
* The DMA used for Ethernet cannot work with the SoC-internal "System
    RAM", thus we use the external memory (SDRAM) for DMA descriptors
    and buffers.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

There's no so much differences between different families of STM32.
Manual (migrate STM32F1 -> STM32F2) says, that GPIO and Flash are
significantly different, the other interfaces (we use) are almost
the same. So, let's name this arch as 'stm32', not 'stm32f2' (as we
do this in linux).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

There's only one MAC controller in all STM32 products. No need to
have it regs 'mapped' in eth device structure (actually, there's
even no need in this structure at all - MAC is always one).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Don't declare & init local volatile pointer vars to access these
regs in each function, which need these. Use macros instead.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Rationale: to support external RAM there'll be again (like in MAC)
a plenty of GPIOs which should be configured. Don't want to redfine
the GPIO descriptor structure (port + pin), let's have this struct
as a part of STM32F2 GPIO Driver API.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Note, beside this, to make driver workable, this patch:

- changes SRAM memory distribution. Actually, we have 128K in STM (as
opposite to 64K in A2F). TBDs here: a) CONFIG_MEM_RAM_LEN is a bad
name, since this isn't length of full SRAM, but just a part of it; b)
we should control the summary length of MEM_xxx areas somehow, on a
SOC basis (i.e. A2F has 64K SRAM, STM32F2 has 128K SRAM, etc.), maybe
include/configs/cortex-m3-common.h would be the best choice; c) not
sure if we want to have *all* SRAM parts configurable, e.g. MALLOC size
may be determined automatically.

- in default configuration load files to SRAM (RAM_BUF) (as opposite
to external RAM). TBD here: make this configurable somehow.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Please update the kernel to commit 2619bac, otherwise ethernet driver won't work!

This comment breaks the kernel ethernet driver functionality, see commit id
2619bac in the kernel tree.