1. 14 May, 2013 1 commit
  2. 29 Apr, 2013 1 commit
  3. 01 Apr, 2013 1 commit
  4. 07 Feb, 2013 1 commit
  5. 28 Nov, 2012 1 commit
  6. 23 Nov, 2012 1 commit
  7. 20 Nov, 2012 5 commits
  8. 11 May, 2012 1 commit
    • Alexander Potashev's avatar
      RT77744. lpc4350: Support booting from 16-bit external NOR flash · 9942ae92
      Alexander Potashev authored
       * The Boot ROM bootloader loads only the first 32KBytes of U-Boot image
      from the external 16-bit NOR flash. We make U-Boot load the remaining
      contents of the image.
       * Put all function and data used for bootstrapping in the beginning
      of the U-Boot image in sections `.lpc18xx_image_top_text` and
       * Configure the boot pins to determine the boot source if the relevant
      fields in the One-Time Programmable memory are not set.
       * Configure the remaining EMC pins before reading the whole U-Boot
      image. The Boot ROM bootloader forgets to configure some EMC pins.
       * Reload the U-Boot image from NOR flash only when boot source is
      `EMC 16-bit`.
  9. 03 May, 2012 2 commits
  10. 24 Apr, 2012 1 commit
    • Alexander Potashev's avatar
      RT77744. lpc4350-eval: Basic port · 55246688
      Alexander Potashev authored
      Support the following features:
       * Serial console on USART0.
       * Common pin configuration functions (needed for USART0).
       * Clock configuration: The Cortex-M4 core runs at 204 MHz.
       * `cptf` command is technically available, but has no effect since there is no
      internal flash on LPC18x0/LPC43x0 MCUs.
       * The lowest SRAM region (128 KB at 0x10000000) is reserved for the currently
      running U-Boot image.
  11. 11 Apr, 2012 1 commit
    • Alexander Potashev's avatar
      RT77788. k70-som: Add support for the Emcraft K70-SOM + SOM-BSB platform · 065d7e55
      Alexander Potashev authored
       * Add Makefile target `k70-som_config`.
       * Start K70-SOM board support code by cloning off the TWR-K70F120M
      board-specific code.
       * Update DDR controller configuration to interact with the LPDDR memory chip.
      Update timings for a 120 MHz DDR clock.
       * Remove configuration of pins NFC_D8..NFC_D15, they are not used by 8-bit NAND
       * Optionally support 8-bit NAND flashes in the `fsl_nfc.c` driver.
       * Set correct size of RAM (64 MB).
       * Do not configure the LCD clock, because we do not support LCDs with K70-SOM
       * Update U-Boot prompt, IP address, MAC address, bootargs, hostname.
  12. 09 Apr, 2012 1 commit
    • Alexander Potashev's avatar
      RT76276. Add support for STMicroelectronics STM3240G-EVAL board · f271a6db
      Alexander Potashev authored
      * Clone the board-specific files from those used for the STM3220G-EVAL board.
      * Change STM3220G-EVAL to STM3240G-EVAL where appropriate.
      * cpu/arm_cortexm3/stm32/clock.c: Add support for clock rates up to 168 MHz.
      * Ethernet driver: Implement us/ms delays not tied to CPU clock rate.
      * Ethernet driver: Add `stm_phy_wait_busy()` to reduce code duplication.
      * Raise system clock rate from 120 MHz to 168 MHz.
      * Update PSRAM timings.
      * Disable the PSRAM Synchronous Burst Mode.
  13. 28 Feb, 2012 1 commit
    • Alexander Potashev's avatar
      RT77090. kinetis eth: Fix receiving of Ethernet packets · fe65e8bf
      Alexander Potashev authored
      The Ethernet module of the MCU requires that the RDAR register is set
      only after a while after the RDSR register is set; i.e. the RDAR
      register should not be set immediately after RDSR during initialization
      of the Ethernet module.
        1. If we write to the ENET_RDAR register immediately after initializing
      the ENET_RDSR register, the incoming packets can _never_ be received.
        2. If we make the MCU wait for 10us before writing to ENET_RDAR, the
      incoming packets are _always_ received correctly.
        3. If we perform a few instructions (about 10 of them) between setting
      RDSR and RDAR, then the problem manifests randomly from time to time.
      In order to fix the bug, we add a 10us delay just before writing
      to the RDAR register.
      Things just work in Freescale MQX and in Linux, because there is a lot
      of other initialization code between the RDAR and RDSR register are set,
      so this other initialization code serves as a delay.
  14. 20 Feb, 2012 1 commit
  15. 25 Jan, 2012 2 commits
    • Alexander Potashev's avatar
      RT75957. twr-k70f120m: NAND Flash support; environment in flash · 7de399c1
      Alexander Potashev authored
      This patch consists of the following:
      1. NAND Flash Controller (NFC) pin configuration.
      2. NFC clock configuration (enable the clock, initialize the clock rate.)
      3. Changes to the `fsl_nfc` NFC driver:
           * Code cleanup (there were compilation warnings, e.g. unused data
               and functions.)
           * `#include <asm/immap.h>` should not be used on ARM.
           * Disable the GPIO configuration code on ARM.
           * Use `__raw_writel/__raw_readl` instead of `out_be32/in_be32`.
               The registers of the NAND Flash Controller always use the
               same endianness as the MCU core.
           * Make the code in fsl_nfc_get_id() and fsl_nfc_get_status()
               endianness-independent (they were accessing the data from
               32-bit register as an array of u8, this approach is
      4. NAND support in the U-Boot configuration file.
      5. Support for environment in the NAND flash in the U-Boot configuration
      6. Increase the size of the `RAM` memory region to fit the statically
      allocated data for the NAND driver and the U-Boot framework for NAND.
    • Alexander Potashev's avatar
      RT75957. kinetis nand: import an existing NAND driver · be6ee378
      Alexander Potashev authored
      Import the existing NAND Flash Controller driver for MCF5441x from
      The NAND Flash Controllers on MCF5441x and Kinetis are compatible, we
      will use this driver for Kinetis.
  16. 11 Jan, 2012 1 commit
  17. 04 Jan, 2012 5 commits
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: reuse the `mcffec` Ethernet driver for TWR-K60N512 · aa4e8b78
      Alexander Potashev authored
      Also add the code for:
      1. Enabling the clock gate for the Ethernet module of the MCU,
      2. Pin configuration for RMII.
      3. Disabling the MPU (the Ethernet module will be unable to work with
           the SRAM otherwise.)
      The pull-down resistor for the RXER pin is enabled, because this input
      pin is not connected to the PHY on the TWR-K60N512 board by default.
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: Fix a bug; increase configurability of `mcffec` · e066e32e
      Alexander Potashev authored
      The value for the RCR (Receive Control Register) was wrong in the
      half-duplex mode.
      The `mcf*` targets were not checked for clean build.
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: Untie the `mcffec` driver from m68k · 8bd96b7b
      Alexander Potashev authored
      The `mcf*` targets were not checked for clean build.
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: serial driver implementation · 7e83dab7
      Alexander Potashev authored
      Also in this commit:
      1. `kinetis_periph_enable()` for enabling clocks on various MCU modules.
      2. Minimal GPIO driver with the `kinetis_gpio_config()` function.
      FIFOs are not implemented in this driver (they can be enables via the
      PFIFO, TXWATER and RXWATER registers), because on K60 only UART0
      has a more than single-dataword FIFO, and UART0 is not used on the
      TWR-K60N512 board.
      We use the UART3 on the TWR-K60N512 board which is connected to the DB-9
      port on the TWR-SER board in the TWR-K60N512-KIT board set.
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: the very basic port · b1277b2a
      Alexander Potashev authored
      Stubs for twr-k60n512 port.
      The `.kinetis_flash_conf` section is necessary to keep the MCU flash
      unprotected and allow future flash programming.
      This port does not work, because the Watchdog Timer is not unlocked and
      the MCU is reset by WDT shortly after start-up.
  18. 06 Dec, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. ea-lpc1788: fix hang-up in Ethernet driver after SYSRESET · 6c05ceb4
      Alexander Potashev authored
      To avoid hang-up of the Ethernet block after Cortex-M3 software reset
      (SYSRESET), we need to reset the Ethernet PHY immediately before
      performing the SYSRESET.
      All new code added in this patch should be in placed in `.ramcode`,
      because we might want to do a software reset after self-upgrade.
      Since we cannot use `printf()` in functions that may be called during
      self-upgrade (`printf()` is too big for `.ramcode`), the
      `lpc178x_phy_init()` function cannot be easily used in
      `lpc178x_phy_final_reset()`. Because of this, we use a pre-set PHY
      address (`CONFIG_LPC178X_ETH_PHY_ADDR`) instead of doing automatic
      PHY discovery that is usually done in `lpc178x_phy_init()`.
      If Ethernet is not enabled in the U-Boot configuration file, we do not
      perform the PHY reset.
      This leads to a minor bug: if you install U-Boot without Ethernet
      support into your board and do a self-upgrade to another build of
      U-Boot with Ethernet support, the Ethernet driver will hang in the
      latter U-Boot unless you have done a full reset (by pushing the SW1
      button) after self-upgrade.
  19. 02 Dec, 2011 1 commit
  20. 01 Dec, 2011 1 commit
  21. 30 Nov, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. lpc178x_eth: fix `lpc178x_eth_send()` · 253feef0
      Alexander Potashev authored
      1. Fixed the algorithm for checking if the transmit buffers are full.
      2. Removed unnecessary `udelay()` calls that were kept after copying the
      	code from the LPCware's U-Boot port.
      3. Increased the numbers of receive and transmit DMA buffers.
  22. 24 Nov, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. ea-lpc1788: Ethernet driver · 0ee5d6e6
      Alexander Potashev authored
      * The driver structure is almost the same as in the STM32 Ethernet driver.
      * The PHY autodetection code was copied from the STM32 Ethernet driver
          (see `lpc178x_phy_init()`)
      * The speed/duplex detection logic grabbed from the Linux kernel
          (see linux/drivers/net/phy/phy_device.c)
      * The DMA used for Ethernet cannot work with the SoC-internal "System
          RAM", thus we use the external memory (SDRAM) for DMA descriptors
          and buffers.
  23. 22 Nov, 2011 1 commit
  24. 18 Nov, 2011 1 commit
  25. 14 Nov, 2011 4 commits
  26. 11 Nov, 2011 1 commit
  27. 10 Nov, 2011 1 commit