- 25 Jan, 2012 1 commit
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Alexander Potashev authored
This patch consists of the following: 1. NAND Flash Controller (NFC) pin configuration. 2. NFC clock configuration (enable the clock, initialize the clock rate.) 3. Changes to the `fsl_nfc` NFC driver: * Code cleanup (there were compilation warnings, e.g. unused data and functions.) * `#include <asm/immap.h>` should not be used on ARM. * Disable the GPIO configuration code on ARM. * Use `__raw_writel/__raw_readl` instead of `out_be32/in_be32`. The registers of the NAND Flash Controller always use the same endianness as the MCU core. * Make the code in fsl_nfc_get_id() and fsl_nfc_get_status() endianness-independent (they were accessing the data from 32-bit register as an array of u8, this approach is endianness-dependent.) 4. NAND support in the U-Boot configuration file. 5. Support for environment in the NAND flash in the U-Boot configuration file. 6. Increase the size of the `RAM` memory region to fit the statically allocated data for the NAND driver and the U-Boot framework for NAND.
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- 17 Jan, 2012 1 commit
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Alexander Potashev authored
Take the DDR controller configuration (including memory timings) from the Freescale's sample code package (KINETIS_120MHZ_SC.zip). Move `struct kinetis_sim_regs` to `include/asm-arm/arch-kinetis/kinetis.h`, because the SIM registers have to be updated in order to properly configure the DDR controller for the given external memory chip. DDR works in the asynchronous mode. Set the DDR clock to 150 MHz (using the PLL1). For the board with external DDR memory, the DDR configuration code should be enabled using the CONFIG_KINETIS_DDR configuration option in the U-Boot configuration file.
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- 04 Jan, 2012 4 commits
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Alexander Potashev authored
Also add the code for: 1. Enabling the clock gate for the Ethernet module of the MCU, 2. Pin configuration for RMII. 3. Disabling the MPU (the Ethernet module will be unable to work with the SRAM otherwise.) The pull-down resistor for the RXER pin is enabled, because this input pin is not connected to the PHY on the TWR-K60N512 board by default.
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Alexander Potashev authored
Also in this commit: 1. `kinetis_periph_enable()` for enabling clocks on various MCU modules. 2. Minimal GPIO driver with the `kinetis_gpio_config()` function. FIFOs are not implemented in this driver (they can be enables via the PFIFO, TXWATER and RXWATER registers), because on K60 only UART0 has a more than single-dataword FIFO, and UART0 is not used on the TWR-K60N512 board. We use the UART3 on the TWR-K60N512 board which is connected to the DB-9 port on the TWR-SER board in the TWR-K60N512-KIT board set.
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Alexander Potashev authored
If we do not disable the watchdog timer in a few MCU clocks after reset, it will reset the MCU.
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Alexander Potashev authored
Stubs for twr-k60n512 port. The `.kinetis_flash_conf` section is necessary to keep the MCU flash unprotected and allow future flash programming. This port does not work, because the Watchdog Timer is not unlocked and the MCU is reset by WDT shortly after start-up.
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- 08 Nov, 2011 1 commit
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Alexander Potashev authored
Stubs for ea-lpc1788 port.
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- 07 Oct, 2011 1 commit
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Yuri Tikhonov authored
There's no so much differences between different families of STM32. Manual (migrate STM32F1 -> STM32F2) says, that GPIO and Flash are significantly different, the other interfaces (we use) are almost the same. So, let's name this arch as 'stm32', not 'stm32f2' (as we do this in linux). Signed-off-by:
Yuri Tikhonov <yur@emcraft.com>
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- 17 Sep, 2011 1 commit
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Yuri Tikhonov authored
Stubs for stm3220g-eval port. Signed-off-by:
Yuri Tikhonov <yur@emcraft.com>
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- 25 Jan, 2011 1 commit
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Sergei Poselenov authored
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- 06 Jan, 2011 1 commit
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Vladimir Khusainov authored
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