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The problem in crashes while performing self-upgrade was that
".ramcode" envm_write_and_reset() was optimized to be inlined into
the flash-based do_cptf(). Removing "static" makes do_cptf() to do
the call.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

This version supports the whole flash erase only.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

There's no so much differences between different families of STM32.
Manual (migrate STM32F1 -> STM32F2) says, that GPIO and Flash are
significantly different, the other interfaces (we use) are almost
the same. So, let's name this arch as 'stm32', not 'stm32f2' (as we
do this in linux).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

There's only one MAC controller in all STM32 products. No need to
have it regs 'mapped' in eth device structure (actually, there's
even no need in this structure at all - MAC is always one).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Don't declare & init local volatile pointer vars to access these
regs in each function, which need these. Use macros instead.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

 cortex_m3_irq_vec_get() from platform-specific cpu.c to the common CM3 code.
 However, a platform can implement their own reset_cpu().

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Before the change, timer showed 12-13 seconds on the 10 seconds sleep.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Set timings to acceptable minimums for IS61WV102416BLL assuming
the maximum HCLK of 120MHz.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Set console, passed to kernel by default, do ttyS2, which corresponds
to UART3. Unfortunatelly, there's no way to use UART1 (and ttyS0) on
this board, just because the GPIO pins used for RS-232 here in alter-
native functions have only UART3 and UART4 capabilities (btw, I tested
that being configured to use UART4 - U-Boot console works well too).

Also, fix-up platform configuration, and TFTP boot dir (in linux we'll
assume STM32 platform, not STM32F2 as we currently do in U-Boot).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Rationale: to support external RAM there'll be again (like in MAC)
a plenty of GPIOs which should be configured. Don't want to redfine
the GPIO descriptor structure (port + pin), let's have this struct
as a part of STM32F2 GPIO Driver API.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

This reverts commit 664f519a

.

Move drivers back to drivers/gpio|serial.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Little code cleanup for CM3 and A2F targets.

Note, beside this, to make driver workable, this patch:

- changes SRAM memory distribution. Actually, we have 128K in STM (as
opposite to 64K in A2F). TBDs here: a) CONFIG_MEM_RAM_LEN is a bad
name, since this isn't length of full SRAM, but just a part of it; b)
we should control the summary length of MEM_xxx areas somehow, on a
SOC basis (i.e. A2F has 64K SRAM, STM32F2 has 128K SRAM, etc.), maybe
include/configs/cortex-m3-common.h would be the best choice; c) not
sure if we want to have *all* SRAM parts configurable, e.g. MALLOC size
may be determined automatically.

- in default configuration load files to SRAM (RAM_BUF) (as opposite
to external RAM). TBD here: make this configurable somehow.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

E.g.:
"
 U-Boot 2010.03-00020-gef3a000 (Sep 25 2011 - 16:21:34)

 CPU  : STM32 F2 series (Cortex-M3)
 Freqs: SYSCLK=120MHz,HCLK=120MHz,PCLK1=30MHz,PCLK2=60MHz
 Board: STM3220G-EVAL board 1
 DRAM:   0 kB
 Using default environment
 ...
"
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

MCO will be used for clocking PHY in ethernet.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Beside of faster working we'll need HSE for clocking MAC (previously
we was clocked by HSI, by poweron default).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Use this driver to configure GPIOs for using them:
- with UART (right now);
- with Ethernet (in the forthcoming patches).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>

Use ID assigned here:
http://www.arm.linux.org.uk/developer/machines/

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>