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Put multiline `printf()` calls in curly braces.

We use IAP commands for writing into eNVM.

All code and pre-initialized data that are used during self-upgrade
are forced to reside in `.ramcode` and `.data` respectively.
Uninitialized data go into `.bss` automatically.

1. Fixed the algorithm for checking if the transmit buffers are full.
2. Removed unnecessary `udelay()` calls that were kept after copying the
	code from the LPCware's U-Boot port.
3. Increased the numbers of receive and transmit DMA buffers.

UART0 has id=0 in Linux.

The checksum at predefined offset is required for execution of images
from the LPC178X eNVM. This patch automates the creation of this
checksum, the resulted images are u-boot-lpc.bin and u-boot-lpc.hex.

This is required for any code execution (including the Linux kernel) in
the external RAM on LPC178x/7x.

* The driver structure is almost the same as in the STM32 Ethernet driver.
* The PHY autodetection code was copied from the STM32 Ethernet driver
    (see `lpc178x_phy_init()`)
* The speed/duplex detection logic grabbed from the Linux kernel
    (see linux/drivers/net/phy/phy_device.c)
* The DMA used for Ethernet cannot work with the SoC-internal "System
    RAM", thus we use the external memory (SDRAM) for DMA descriptors
    and buffers.

* ..._BIT definitions used for single bits converted to ..._MSK
    definitions to remove extra (1 << ...something...) expressions from
    the code.
* Added more definitions of bits that are necessary for the Linux kernel
    port.

Convert `struct lpc178x_scc_regs` to the STM32/SmartFusion structure
style, i.e. use `rsvN[M]` hole fillers instead of `union`s for
alignment.

The DRAM configuration is the same as in the existing port from LPCware.

Make clear that `CONFIG_SYS_BOARD_REV_STR` is the revision number.

values. With these settings both our reworked ST-MEM cards works.

Use internal clock (CPU clock) for the Cortex-M3 systick timer, because
the external clock pin (STCLK) cannot be used on this board (it is already
used for SDRAM.)

Configure GPIO pins for UART.

GPIO driver:
 * lpc178x_gpio_config_table()
 * lpc178x_gpio_config_direction()
 * lpc178x_gpout_set()
 * lpc178x_gpin_get()

This reverts commit 1ddfff86.

Options that needs to be set in the board configuration file are
superfluous, because there is are no lpc178x-specific headers visible to
drivers/serial/serial.c where we could place extra (board-independent)
options.

Power for the UART will be enabled in the new function
`cortex_m3_soc_init()`.

Also, enabled CONFIG_MISC_INIT_R to set the non-default flash timings.

Peripheral clock is used for many devices (UARTs, timers, etc.)

for non-STM32 targets.

`struct lpc178x_scc_regs` is only used by power- and clock-related code,
all this code will be only in clock.c.

CPU clock is set up to 108 MHz for now, because the existing port
used that frequency and it works for sure. 120 MHz can be easily
reached by setting CONFIG_LPC178X_PLL0_M to 10 (instead of 9).

SYSTICK timer is already initialized by the common code in
`cpu/arm_cortexm3/timer.c`

* Guard misc_init_r() function with `#ifdef CONFIG_MISC_INIT_R`.
* Enable misc_init_r() for this board.

Stubs for ea-lpc1788 port.

 - Changed gpio_set() to return 0 on success, -EINVAL otherwise
 - Made printf() conditional on the serial console initialization
   (printf() may hang otherwise).