Commit b45de811 authored by Sergei Poselenov's avatar Sergei Poselenov

RT #62660. Cleanup. Added the "BEFORE_CLEANUP" tag beforehand on all distribution git repos.

parent 042aa6be
......@@ -23,7 +23,6 @@
#include <common.h>
#include <netdev.h>
#include <asm-arm/arch-a2f/a2f.h>
DECLARE_GLOBAL_DATA_PTR;
......
......@@ -1155,7 +1155,7 @@ struct malloc_chunk
INTERNAL_SIZE_T size; /* Size in bytes, including overhead. */
struct malloc_chunk* fd; /* double links -- used only if free. */
struct malloc_chunk* bk;
};
} __attribute__((__may_alias__)) ;
typedef struct malloc_chunk* mchunkptr;
......
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a2fxxxm3.h:#define ENVM_REGS_BASE 0x60100000U
a2fxxxm3.h:#define ENVM_REGS ((NVM_TypeDef *) ENVM_REGS_BASE)
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* Assertion implementation.
*
* This file provides the implementation of the ASSERT macro. This file can be
* modified to cater for project specific requirements regarding the way
* assertions are handled.
*
* SVN $Revision: 1676 $
* SVN $Date: 2009-12-02 16:47:03 +0000 (Wed, 02 Dec 2009) $
*/
#ifndef __MSS_ASSERT_H_
#define __MSS_ASSERT_H_
#include <assert.h>
#if defined ( __GNUC__ )
#if defined(NDEBUG)
#define ASSERT(CHECK)
#else /* NDEBUG */
/*
* SoftConsole assertion handling
*/
#define ASSERT(CHECK) \
do { \
if (!(CHECK)) \
{ \
__asm volatile ("BKPT\n\t"); \
} \
} while (0);
#endif /* NDEBUG */
#else
/*
* IAR Embedded Workbench or Keil assertion handling.
* Call C library assert function which should result in error message
* displayed in debugger.
*/
#define ASSERT(X) assert(X)
#endif
#endif /* __MSS_ASSERT_H_ */
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion A2FxxxM3 CMSIS system initialization.
*
* SVN $Revision: 2069 $
* SVN $Date: 2010-01-28 00:23:48 +0000 (Thu, 28 Jan 2010) $
*/
#include <common.h>
#include "a2fxxxm3.h"
#include "mss_assert.h"
/* System frequency (FCLK) coming out of reset is 25MHz. */
#define RESET_SYSCLCK_FREQ CONFIG_SYS_RESET_SYSCLCK_FREQ
/*
* SmartFusion Microcontroller Subsystem FLCK frequency.
* The value of SMARTFUSION_FCLK_FREQ is used to report the system's clock
* frequency in system's which either do not use the Actel System Boot or
* a version of the Actel System Boot older than 1.3.1. In eitehr of these cases
* SMARTFUSION_FCLK_FREQ should be defined in the projects settings to reflect
* the FCLK frequency selected in the Libero MSS configurator.
* Systems using the Actel System Boot version 1.3.1 or later do not require this
* define since the system's frequency is retrieved from eNVM spare pages where
* the MSS Configurator stored the frequency selected during hardware design/configuration.
*/
#ifdef SMARTFUSION_FCLK_FREQ
#define SMARTFUSION_FCLK_FREQ_DEFINED 1
#else
#define SMARTFUSION_FCLK_FREQ_DEFINED 0
#define SMARTFUSION_FCLK_FREQ RESET_SYSCLCK_FREQ
#endif
/* Divider values for APB0, APB1 and ACE clocks. */
#define RESET_PCLK0_DIV 4uL
#define RESET_PCLK1_DIV 4uL
#define RESET_ACE_DIV 4uL
#define RESET_FPGA_CLK_DIV 4uL
/* System register clock control mask and shift for PCLK dividers. */
#define PCLK_DIV_MASK 0x00000003uL
#define PCLK0_DIV_SHIFT 2uL
#define PCLK1_DIV_SHIFT 4uL
#define ACE_DIV_SHIFT 6uL
/* System register MSS_CCC_DIV_CR mask and shift for GLB (FPGA fabric clock). */
#define OBDIV_SHIFT 8uL
#define OBDIV_MASK 0x0000001FuL
#define OBDIVHALF_SHIFT 13uL
#define OBDIVHALF_MASK 0x00000001uL
/*
* Actel system boot version defines used to extract the system clock from eNVM
* spare pages.
* These defines allow detecting the presence of Actel system boot in eNVM spare
* pages and the version of that system boot executable and associated
* configuration data.
*/
#define SYSBOOT_KEY_ADDR (uint32_t *)0x6008081C
#define SYSBOOT_KEY_VALUE 0x4C544341uL
#define SYSBOOT_VERSION_ADDR (uint32_t *)0x60080840
#define SYSBOOT_1_3_FCLK_ADDR (uint32_t *)0x6008162C
#define SYSBOOT_2_x_FCLK_ADDR (uint32_t *)0x60081EAC
/*
* The system boot version is stored in the least significant 24 bits of a word.
* The FCLK is stored in eNVM from version 1.3.1 of the system boot. We expect
* that the major version number of the system boot version will change if the
* system boot configuration data layout needs to change.
*/
#define SYSBOOT_VERSION_MASK 0x00FFFFFFuL
#define MIN_SYSBOOT_VERSION 0x00010301uL
#define SYSBOOT_VERSION_2_X 0x00020000uL
#define MAX_SYSBOOT_VERSION 0x00030000uL
/* Standard CMSIS global variables. */
uint32_t SystemFrequency = SMARTFUSION_FCLK_FREQ; /*!< System Clock Frequency (Core Clock) */
uint32_t SystemCoreClock = SMARTFUSION_FCLK_FREQ; /*!< System Clock Frequency (Core Clock) */
/* SmartFusion specific clocks. */
uint32_t g_FrequencyPCLK0 = (SMARTFUSION_FCLK_FREQ / RESET_PCLK0_DIV); /*!< Clock frequency of APB bus 0. */
uint32_t g_FrequencyPCLK1 = (SMARTFUSION_FCLK_FREQ / RESET_PCLK1_DIV); /*!< Clock frequency of APB bus 1. */
uint32_t g_FrequencyACE = (SMARTFUSION_FCLK_FREQ / RESET_ACE_DIV); /*!< Clock frequency of Analog Compute Engine. */
uint32_t g_FrequencyFPGA = (SMARTFUSION_FCLK_FREQ / RESET_FPGA_CLK_DIV); /*!< Clock frequecny of FPGA fabric */
/* Local functions */
static uint32_t GetSystemClock( void );
/***************************************************************************//**
* See system_a2fm3fxxx.h for details.
*/
void SystemInit(void)
{
}
/***************************************************************************//**
*
*/
void SystemCoreClockUpdate (void)
{
uint32_t PclkDiv0;
uint32_t PclkDiv1;
uint32_t AceDiv;
uint32_t FabDiv;
const uint32_t pclk_div_lut[4] = { 1uL, 2uL, 4uL, 1uL };
/* Read PCLK dividers from system registers. Multiply the value read from
* system register by two to get actual divider value. */
PclkDiv0 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK0_DIV_SHIFT) & PCLK_DIV_MASK)];
PclkDiv1 = pclk_div_lut[((SYSREG->MSS_CLK_CR >> PCLK1_DIV_SHIFT) & PCLK_DIV_MASK)];
AceDiv = pclk_div_lut[((SYSREG->MSS_CLK_CR >> ACE_DIV_SHIFT) & PCLK_DIV_MASK)];
{
/* Compute the FPGA fabric frequency divider. */
uint32_t obdiv;
uint32_t obdivhalf;
obdiv = (SYSREG->MSS_CCC_DIV_CR >> OBDIV_SHIFT) & OBDIV_MASK;
obdivhalf = (SYSREG->MSS_CCC_DIV_CR >> OBDIVHALF_SHIFT) & OBDIVHALF_MASK;
FabDiv = obdiv + 1uL;
if ( obdivhalf != 0uL )
{
FabDiv = FabDiv * 2uL;
}
}
/* Retrieve FCLK from eNVM spare pages if Actel system boot programmed as part of the system. */
/* Read system clock from eNVM spare pages. */
SystemCoreClock = GetSystemClock();
g_FrequencyPCLK0 = SystemCoreClock / PclkDiv0;
g_FrequencyPCLK1 = SystemCoreClock / PclkDiv1;
g_FrequencyACE = SystemCoreClock / AceDiv;
g_FrequencyFPGA = SystemCoreClock / FabDiv;
/* Keep SystemFrequency as well as SystemCoreClock for legacy reasons. */
SystemFrequency = SystemCoreClock;
}
/***************************************************************************//**
* Retrieve the system clock frequency from eNVM spare page if available.
* Returns the frequency defined through SMARTFUSION_FCLK_FREQ if FCLK cannot be
* retrieved from eNVM spare pages.
* The FCLK frequency value selected in the MSS Configurator software tool is
* stored in eNVM spare pages as part of the Actel system boot configuration data.
*/
uint32_t GetSystemClock( void )
{
uint32_t fclk = 0uL;
uint32_t * p_sysboot_key = SYSBOOT_KEY_ADDR;
if ( SYSBOOT_KEY_VALUE == *p_sysboot_key )
{
/* Actel system boot programmed, check if it has the FCLK value stored. */
uint32_t *p_sysboot_version = SYSBOOT_VERSION_ADDR;
uint32_t sysboot_version = *p_sysboot_version;
sysboot_version &= SYSBOOT_VERSION_MASK;
if ( sysboot_version >= MIN_SYSBOOT_VERSION )
{
/* Handle change of eNVM location of FCLK between 1.3.x and 2.x.x versions of the system boot. */
if ( sysboot_version < SYSBOOT_VERSION_2_X )
{
/* Read FCLK value from MSS configurator generated configuration
* data stored in eNVM spare pages as part of system boot version 1.3.x
* configuration tables. */
uint32_t *p_fclk = SYSBOOT_1_3_FCLK_ADDR;
fclk = *p_fclk;
}
else if ( sysboot_version < MAX_SYSBOOT_VERSION )
{
/* Read FCLK value from MSS configurator generated configuration
* data stored in eNVM spare pages as part of system boot version 2.x.x
* configuration tables. */
uint32_t *p_fclk = SYSBOOT_2_x_FCLK_ADDR;
fclk = *p_fclk;
}
else
{
fclk = 0uL;
}
}
}
if ( 0uL == fclk )
{
/*
* Could not retrieve FCLK from system boot configuration data. Fall back
* to using SMARTFUSION_FCLK_FREQ which must then be defined as part of
* project settings.
*/
ASSERT( SMARTFUSION_FCLK_FREQ_DEFINED );
fclk = SMARTFUSION_FCLK_FREQ;
}
return fclk;
}
/*******************************************************************************
* (c) Copyright 2009 Actel Corporation. All rights reserved.
*
* SmartFusion A2FxxxM3 CMSIS system initialization.
*
* SVN $Revision: 2064 $
* SVN $Date: 2010-01-27 15:05:58 +0000 (Wed, 27 Jan 2010) $
*/
#ifndef __SYSTEM_A2FM3FXX_H__
#define __SYSTEM_A2FM3FXX_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Standard CMSIS global variables. */
extern uint32_t SystemFrequency; /*!< System Clock Frequency (Core Clock) */
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/* SmartFusion specific clocks. */
extern uint32_t g_FrequencyPCLK0; /*!< Clock frequency of APB bus 0. */
extern uint32_t g_FrequencyPCLK1; /*!< Clock frequency of APB bus 1. */
extern uint32_t g_FrequencyACE; /*!< Clock frequency of Analog Compute Engine. */
extern uint32_t g_FrequencyFPGA; /*!< Clock frequecny of FPGA fabric */
/***************************************************************************//**
* The SystemInit() is a standard CMSIS function called during system startup.
* It is meant to perform low level hardware setup such as configuring PLLs. In
* the case of SmartFusion these hardware setup operations are performed by the
* chip boot which executed before the application started. Therefore this
* function does not need to perform any hardware setup.
*/
void SystemInit(void);
/***************************************************************************//**
* The SystemCoreClockUpdate() is a standard CMSIS function which can be called
* by the application in order to ensure that the SystemCoreClock global
* variable contains the up to date Cortex-M3 core frequency. Calling this
* function also updates the global variables containing the frequencies of the
* APB busses connecting the peripherals and the ACE frequency.
*/
void SystemCoreClockUpdate(void);
#ifdef __cplusplus
}
#endif
#endif
......@@ -2,6 +2,9 @@
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Port to A2F
# Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com.
#
# See file CREDITS for list of people who contributed to this
# project.
#
......@@ -26,8 +29,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START := start.o
COBJS := cpu.o timer.o cmd_cptf.o envm.o wdt.o \
CMSIS/system_a2fxxxm3.o CMSIS/core_cm3.o
COBJS := cpu.o timer.o cmd_cptf.o envm.o wdt.o
SRCS := $(START:.o=.c) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <string.h>
#include "CMSIS/a2fxxxm3.h"
#include "envm.h"
#define A2F_RAM_BUFFER_BASE 0x20004000
......@@ -33,11 +51,8 @@ static int __attribute__((section(".ramcode")))
if (do_reset) {
/*
* Cortex-M3 core reset.
* This call is actually all inlined so there are
* no function calls in here and no care should be
* taken about "long-call" function-calling conventions
*/
NVIC_SystemReset();
reset_cpu(0);
/*
* Should never be here.
......@@ -49,38 +64,6 @@ static int __attribute__((section(".ramcode")))
}
#if 0
int do_cpff(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong flash_buf;
ulong ram_buf = A2F_RAM_BUFFER_BASE;
int ret = 0;
if (argc == 1) {
printf("%s: Flash offset must be specified\n",
(char *) argv[0]);
goto Done;
}
flash_buf = simple_strtoul(argv[1], NULL, 16);
printf("%s: f=%x r=%x\n",
(char *) argv[0], (uint) flash_buf, (uint) ram_buf);
(void) memcpy((void *) ram_buf, (void *) flash_buf,
A2F_RAM_BUFFER_SIZE);
Done:
return ret;
}
U_BOOT_CMD(
cpff, 2, 0, do_cpff,
"copy internal Flash of the A2F to a RAM buffer",
"flash_off [ram_buf]"
);
#endif
/*
* cptf: copy content of a buffer (including one in Flash) to Flash.
*/
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <command.h>
#include <asm-arm/arch-a2f/a2f.h>
#include "envm.h"
#include "wdt.h"
#include "CMSIS/a2fxxxm3.h"
DECLARE_GLOBAL_DATA_PTR;
......@@ -22,9 +39,9 @@ int arch_cpu_init(void)
* Initialize timer
* TO-DO: move this somewhere else
*/
SYSREG->SOFT_RST_CR &= ~(1 << 6);
TIMER->TIM64_MODE = 0;
TIMER->TIM1_CTRL = 0x03;
A2F_SYSREG->soft_rst_cr &= ~(1 << 6);
A2F_TIMER->timer64_mode = 0;
A2F_TIMER->timer1_ctrl = 0x03;
envm_init();
......
#include "CMSIS/a2fxxxm3.h"
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
/*
* ENVM control & status registers
......@@ -53,6 +73,10 @@ struct mss_envm {
#define MSS_ENVM_STATUS_BUSY ((1<<0)|(1<<16))
#define MSS_ENVM_STATUS_ERROR_MASK (0x300|(0x300<<16))
/* Clock frequency of APB bus 0. */
#define RESET_PCLK0_DIV 4
#define FREQ_PCLK0 (CONFIG_SYS_RESET_SYSCLCK_FREQ / RESET_PCLK0_DIV)
/*
* Initialize the eNVM interface
*/
......@@ -103,9 +127,9 @@ static int __attribute__((section(".ramcode")))
/*
* If not done yet, delay
*/
TIMER->TIM1_LOADVAL =
MSS_ENVM_WAIT_INTERVAL * (g_FrequencyPCLK0 / 1000000);
while (TIMER->TIM1_VAL) ;
A2F_TIMER->timer1_loadval =
MSS_ENVM_WAIT_INTERVAL * (FREQ_PCLK0 / 1000000);
while (A2F_TIMER->timer1_val) ;
}
/*
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __ENVM_H__
#define __ENVM_H__
......
#include <config.h>
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <string.h>
#include <asm/arch-a2f/a2f.h>
#include "wdt.h"
#include "CMSIS/a2fxxxm3.h"
extern void printf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
extern char _data_lma_start;
extern char _data_start;
extern char _data_end;
extern char _bss_start;
extern char _bss_end;
unsigned long _armboot_start;
extern char armboot_start;
unsigned int _armboot_start;
extern char _bss_start; /* code + data end == BSS start */
extern char _bss_end; /* BSS end */
void _start(void);
void default_isr(void);
......@@ -92,14 +116,14 @@ void _start(void)
* is defined in the CPU specific .lds file.
* TO-DO: There is yet another complication here. The ARM generic code
* makes the assumption that the malloc pool resides right below
* the U-boot code, as relocated to RAM and hence _armoot_start
* the U-boot code, as relocated to RAM and hence _armboot_start
* is both the base of the U-boot code and the upper boundary
* for the malloc pool ... This is not the case for A2F, hence
* we will have to re-set _armoot_start to the U-boot code base
* in the CPU specific initialization code.
* There is the same issue for another global: monitor_flash_len
*/
_armboot_start = &armboot_start;
_armboot_start = (unsigned long)&armboot_start;
start_armboot();
}
......@@ -141,7 +165,7 @@ static void __attribute__((used)) dump_ctx(unsigned int *ctx)
"PENDSV",
"SYSTICK",
};
unsigned char vec = SCB->ICSR & 0xFF;
unsigned char vec = A2F_SCB->icsr & 0xFF;
int i;
printf("==================================\n");
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* Code cleanup
* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include "CMSIS/a2fxxxm3.h"
#include "CMSIS/core_cm3.h"
struct systick {
uint32_t ctrl; /* SysTick Control and Status Register */
uint32_t load; /* SysTick Reload Value Register */
uint32_t val; /* SysTick Current Value Register */
uint32_t cal; /* SysTick Calibration Register */
};
/* SysTick Base Address */
#define A2F_SYSTICK_BASE (A2F_SCS_BASE + 0x0010)
#define A2F_SYSTICK ((volatile struct systick *)(A2F_SYSTICK_BASE))
/* SysTick LOAD: RELOAD Position */
#define SYSTICK_LOAD_RELOAD_POS 0
/* SysTick CTRL: ENABLE Position */
#define SYSTICK_CTRL_ENABLE_POS 0
/* SysTick LOAD: RELOAD Mask */
#define SYSTICK_LOAD_RELOAD_MSK (0xFFFFFFul << SYSTICK_LOAD_RELOAD_POS)
/* SysTick CTRL: ENABLE Mask */
#define SYSTICK_CTRL_ENABLE_MSK (1ul << SYSTICK_CTRL_ENABLE_POS)
/* Internal tick units */
static unsigned long long timestamp; /* Monotonic incrementing timer */
......@@ -8,14 +48,14 @@ static unsigned long lastdec; /* Last decremneter snapshot */
int timer_init()
{
SYSREG->SYSTICK_CR &= ~(1<<25); /* en noref */
SYSREG->SYSTICK_CR |= (3 << 28); /* div by 32 */
SYSREG->SYSTICK_CR &= ~0xffffff;
SYSREG->SYSTICK_CR |= 0x7a12;
SysTick->LOAD = SysTick_LOAD_RELOAD_Msk - 1;
SysTick->VAL = 0;
A2F_SYSREG->systick_cr &= ~(1<<25); /* en noref */
A2F_SYSREG->systick_cr |= (3 << 28); /* div by 32 */
A2F_SYSREG->systick_cr &= ~0xffffff;
A2F_SYSREG->systick_cr |= 0x7a12;
A2F_SYSTICK->load = SYSTICK_LOAD_RELOAD_MSK - 1;
A2F_SYSTICK->val = 0;
/* we don't want ints to be enabled */
SysTick->CTRL = SysTick_CTRL_ENABLE_Msk;
A2F_SYSTICK->ctrl = SYSTICK_CTRL_ENABLE_MSK;
timestamp = 0;
return 0;
......@@ -23,12 +63,12 @@ int timer_init()
unsigned long get_timer(unsigned long base)
{
unsigned long now = SysTick->VAL;
unsigned long now = A2F_SYSTICK->val;
if (lastdec >= now)
timestamp += lastdec - now;
else
timestamp += lastdec + SysTick_LOAD_RELOAD_Msk - 1 - now;
timestamp += lastdec + SYSTICK_LOAD_RELOAD_MSK - 1 - now;
lastdec = now;
......@@ -37,7 +77,7 @@ unsigned long get_timer(unsigned long base)
void reset_timer(void)
{
lastdec = SysTick->VAL;
lastdec = A2F_SYSTICK->val;
timestamp = 0;
}
......@@ -49,15 +89,15 @@ void __udelay(unsigned long usec)
clc = usec * (CONFIG_SYSTICK_FREQ / 1000000);
/* get current timestamp */
tmp = SysTick->VAL;
tmp = A2F_SYSTICK->val;
if (tmp < clc) {
/* loop till event */
while (SysTick->VAL < tmp ||
SysTick->VAL > (SysTick_LOAD_RELOAD_Msk - 1 - clc + tmp))
while (A2F_SYSTICK->val < tmp ||
A2F_SYSTICK->val > (SYSTICK_LOAD_RELOAD_MSK - 1 - clc + tmp))
; /* nop */
} else {
while (SysTick->VAL > (tmp - clc));
while (A2F_SYSTICK->val > (tmp - clc));
}
}
......
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",