Commit bba92c80 authored by Alexander Potashev's avatar Alexander Potashev

RT106080. stm32: Store clock rate after division by M into CLOCK_DIVM

This clock rate is useful to quicly calculate the output from other
PLLs, for example PLLSAI.
parent 2a7cda15
......@@ -3,6 +3,7 @@
*
* Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
* Vladimir Skvortsov, Emcraft Systems, vskvortsov@emcraft.com
* Alexander Potashev, Emcraft Systems, aspotashev@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
......@@ -406,9 +407,13 @@ void clock_init(void)
/* HSI used as PLL clock source */
tmp = STM32_HSI_HZ;
}
/* Input clock for PLL, PLLI2S and PLLSAI */
clock_val[CLOCK_DIVM] = tmp / pllm;
pllvco = STM32_RCC->pllcfgr >> STM32_RCC_PLLCFGR_PLLN_BIT;
pllvco &= STM32_RCC_PLLCFGR_PLLN_MSK;
pllvco *= tmp / pllm;
pllvco *= clock_val[CLOCK_DIVM];
pllp = STM32_RCC->pllcfgr >> STM32_RCC_PLLCFGR_PLLP_BIT;
pllp &= STM32_RCC_PLLCFGR_PLLP_MSK;
......
......@@ -3,6 +3,7 @@
*
* Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
* Vladimir Skvortsov, Emcraft Systems, vskvortsov@emcraft.com
* Alexander Potashev, Emcraft Systems, aspotashev@emcraft.com
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
......@@ -85,6 +86,7 @@ enum clock {
CLOCK_PCLK1, /* PCLK1 clock frequency expressed in Hz */
CLOCK_PCLK2, /* PCLK2 clock frequency expressed in Hz */
CLOCK_SYSTICK, /* Systimer clock frequency expressed in Hz */
CLOCK_DIVM, /* Input clock for PLL, PLLI2S, PLLSAI in Hz */
CLOCK_END /* for internal usage */
};
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment