1. 03 Mar, 2017 1 commit
    • Sergei Miroshnichenko's avatar
      RM#1313 fdt: stm32: switch: Add run-time gpio-based status switching of DT nodes. · 74ebeb68
      Sergei Miroshnichenko authored
      Add a new driver named "switch" for run-time selection of wanted devices in DT based on gpios:
      
          configuration_switch: configuration_switch {
              compatible = "emcraft,configuration-switch";
              pinctrl-names = "default";
              pinctrl-0 = <&pinctrl_switch>;
          };
      
      ...
          pinctrl_switch: switch {
              st,pins {
                  /* e5 = 4*16 + 5 = 69 */
                  status_pullup = <&gpioe 5 IN
                      PULL_UP PUSH_PULL LOW_SPEED>;
              };
          };
      
      ...
      
      &usb_fs {
          ...
          configuration-switch-gpios = <&gpioe 5 GPIO_ACTIVE_LOW>;
      };
      74ebeb68
  2. 16 Aug, 2016 1 commit
  3. 06 Nov, 2015 1 commit
  4. 18 Aug, 2015 2 commits
  5. 05 Mar, 2015 1 commit
  6. 02 Mar, 2015 1 commit
  7. 27 Feb, 2015 1 commit
  8. 24 Feb, 2015 1 commit
  9. 20 Nov, 2012 1 commit
  10. 24 Apr, 2012 1 commit
    • Alexander Potashev's avatar
      RT77744. lpc4350-eval: Basic port · 55246688
      Alexander Potashev authored
      Support the following features:
       * Serial console on USART0.
       * Common pin configuration functions (needed for USART0).
       * Clock configuration: The Cortex-M4 core runs at 204 MHz.
       * `cptf` command is technically available, but has no effect since there is no
      internal flash on LPC18x0/LPC43x0 MCUs.
       * The lowest SRAM region (128 KB at 0x10000000) is reserved for the currently
      running U-Boot image.
      55246688
  11. 25 Jan, 2012 1 commit
    • Alexander Potashev's avatar
      RT75957. twr-k70f120m: use external memory for the malloc() pool · 7c08c067
      Alexander Potashev authored
      This is required for using the NAND Flash.
      
      Since the generic U-Boot code requires more than 128 KB of RAM for the
      Bad Block Table and we are not going to heavily modify the generic code,
      we add optional support for the malloc() poll in the external memory in
      order to have enough space for the Bad Block Table (the whole internal
      SRAM is only 128 KB in size.) The CONFIG_SYS_MALLOC_EXT_BASE and the
      CONFIG_SYS_MALLOC_EXT_LEN options control the base address and size of
      the malloc() pool. If those preprocessor variables are not defined, use
      the original code for determining the position of the malloc() pool in
      memory.
      7c08c067
  12. 20 Jan, 2012 1 commit
  13. 04 Jan, 2012 1 commit
  14. 06 Dec, 2011 1 commit
  15. 17 Oct, 2011 1 commit
  16. 03 Jan, 2011 1 commit
  17. 31 Aug, 2010 1 commit