1. 25 Jan, 2012 2 commits
    • Alexander Potashev's avatar
      RT75957. twr-k70f120m: NAND Flash support; environment in flash · 7de399c1
      Alexander Potashev authored
      This patch consists of the following:
      1. NAND Flash Controller (NFC) pin configuration.
      2. NFC clock configuration (enable the clock, initialize the clock rate.)
      3. Changes to the `fsl_nfc` NFC driver:
           * Code cleanup (there were compilation warnings, e.g. unused data
               and functions.)
           * `#include <asm/immap.h>` should not be used on ARM.
           * Disable the GPIO configuration code on ARM.
           * Use `__raw_writel/__raw_readl` instead of `out_be32/in_be32`.
               The registers of the NAND Flash Controller always use the
               same endianness as the MCU core.
           * Make the code in fsl_nfc_get_id() and fsl_nfc_get_status()
               endianness-independent (they were accessing the data from
               32-bit register as an array of u8, this approach is
               endianness-dependent.)
      4. NAND support in the U-Boot configuration file.
      5. Support for environment in the NAND flash in the U-Boot configuration
           file.
      6. Increase the size of the `RAM` memory region to fit the statically
      allocated data for the NAND driver and the U-Boot framework for NAND.
      7de399c1
    • Alexander Potashev's avatar
      RT75957. kinetis gpio: two macros for Kinetis had `LPC178X_` in their names · f6577e72
      Alexander Potashev authored
      This is a cosmetic change, no changes in behaviour.
      f6577e72
  2. 17 Jan, 2012 1 commit
    • Alexander Potashev's avatar
      RT75957. twr-k70f120m: configure DDR memory controller · f9fec77e
      Alexander Potashev authored
      Take the DDR controller configuration (including memory timings) from
      the Freescale's sample code package (KINETIS_120MHZ_SC.zip).
      
      Move `struct kinetis_sim_regs` to
      `include/asm-arm/arch-kinetis/kinetis.h`, because the SIM registers
      have to be updated in order to properly configure the DDR controller for
      the given external memory chip.
      
      DDR works in the asynchronous mode.
      
      Set the DDR clock to 150 MHz (using the PLL1).
      
      For the board with external DDR memory, the DDR configuration code
      should be enabled using the CONFIG_KINETIS_DDR configuration option in
      the U-Boot configuration file.
      f9fec77e
  3. 04 Jan, 2012 5 commits
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: reuse the `mcffec` Ethernet driver for TWR-K60N512 · aa4e8b78
      Alexander Potashev authored
      Also add the code for:
      1. Enabling the clock gate for the Ethernet module of the MCU,
      2. Pin configuration for RMII.
      3. Disabling the MPU (the Ethernet module will be unable to work with
           the SRAM otherwise.)
      
      The pull-down resistor for the RXER pin is enabled, because this input
      pin is not connected to the PHY on the TWR-K60N512 board by default.
      aa4e8b78
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: serial driver implementation · 7e83dab7
      Alexander Potashev authored
      Also in this commit:
      1. `kinetis_periph_enable()` for enabling clocks on various MCU modules.
      2. Minimal GPIO driver with the `kinetis_gpio_config()` function.
      
      FIFOs are not implemented in this driver (they can be enables via the
      PFIFO, TXWATER and RXWATER registers), because on K60 only UART0
      has a more than single-dataword FIFO, and UART0 is not used on the
      TWR-K60N512 board.
      
      We use the UART3 on the TWR-K60N512 board which is connected to the DB-9
      port on the TWR-SER board in the TWR-K60N512-KIT board set.
      7e83dab7
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: disable the watchdog, it is enabled on reset · 5d52a173
      Alexander Potashev authored
      If we do not disable the watchdog timer in a few MCU clocks after reset,
      it will reset the MCU.
      5d52a173
    • Alexander Potashev's avatar
      RT75747. ea-lpc1788: USB clock configuration · 72e40b68
      Alexander Potashev authored
      * The USB clock configuration code is disabled by default
      * PLL1 will be configured only if the USB clock is enabled by defining
          the CONFIG_LPC178X_USB_DIV option in the board configuration file.
      72e40b68
    • Alexander Potashev's avatar
      RT74765. twr-k60n512: the very basic port · b1277b2a
      Alexander Potashev authored
      Stubs for twr-k60n512 port.
      
      The `.kinetis_flash_conf` section is necessary to keep the MCU flash
      unprotected and allow future flash programming.
      
      This port does not work, because the Watchdog Timer is not unlocked and
      the MCU is reset by WDT shortly after start-up.
      b1277b2a
  4. 06 Dec, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. ea-lpc1788: fix hang-up in Ethernet driver after SYSRESET · 6c05ceb4
      Alexander Potashev authored
      To avoid hang-up of the Ethernet block after Cortex-M3 software reset
      (SYSRESET), we need to reset the Ethernet PHY immediately before
      performing the SYSRESET.
      
      All new code added in this patch should be in placed in `.ramcode`,
      because we might want to do a software reset after self-upgrade.
      
      Since we cannot use `printf()` in functions that may be called during
      self-upgrade (`printf()` is too big for `.ramcode`), the
      `lpc178x_phy_init()` function cannot be easily used in
      `lpc178x_phy_final_reset()`. Because of this, we use a pre-set PHY
      address (`CONFIG_LPC178X_ETH_PHY_ADDR`) instead of doing automatic
      PHY discovery that is usually done in `lpc178x_phy_init()`.
      
      If Ethernet is not enabled in the U-Boot configuration file, we do not
      perform the PHY reset.
      This leads to a minor bug: if you install U-Boot without Ethernet
      support into your board and do a self-upgrade to another build of
      U-Boot with Ethernet support, the Ethernet driver will hang in the
      latter U-Boot unless you have done a full reset (by pushing the SW1
      button) after self-upgrade.
      6c05ceb4
  5. 01 Dec, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. ea-lpc1788: self-upgrade · 75e64206
      Alexander Potashev authored
      We use IAP commands for writing into eNVM.
      
      All code and pre-initialized data that are used during self-upgrade
      are forced to reside in `.ramcode` and `.data` respectively.
      Uninitialized data go into `.bss` automatically.
      75e64206
  6. 24 Nov, 2011 4 commits
  7. 22 Nov, 2011 1 commit
  8. 18 Nov, 2011 2 commits
  9. 14 Nov, 2011 3 commits
  10. 11 Nov, 2011 1 commit
  11. 10 Nov, 2011 4 commits
  12. 09 Nov, 2011 1 commit
    • Alexander Potashev's avatar
      RT73025. ea-lpc1788: setup clocks · 43ef08fa
      Alexander Potashev authored
      CPU clock is set up to 108 MHz for now, because the existing port
      used that frequency and it works for sure. 120 MHz can be easily
      reached by setting CONFIG_LPC178X_PLL0_M to 10 (instead of 9).
      
      SYSTICK timer is already initialized by the common code in
      `cpu/arm_cortexm3/timer.c`
      43ef08fa
  13. 08 Nov, 2011 1 commit
  14. 20 Oct, 2011 3 commits
  15. 18 Oct, 2011 2 commits
  16. 17 Oct, 2011 1 commit
  17. 14 Oct, 2011 1 commit
  18. 07 Oct, 2011 4 commits
  19. 06 Oct, 2011 1 commit
  20. 05 Oct, 2011 1 commit