1. 16 Nov, 2018 1 commit
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  21. 09 Feb, 2015 1 commit
    • Yuri Tikhonov's avatar
      RT106081: U-Boot STM32F7: fix-up MPU configuration · 7356326f
      Yuri Tikhonov authored
      In case of disabled DCACHE we previously had the only one 4GB MPU
      region with 'Strongly ordered' mem type. This led to problems with
      strex/ldrex instruction targeted such mem (and thus we couldn't use
      these instructions).
      
      Now we always create 2 MPU region, even if DCACHE is off. The 2nd
      MPU region is mapped to external SDRAM, and has 'Normal' mem type.
      
      This patch also changes 'write-through' caching policy to 'write-
      back with write & read allocate'.
      Signed-off-by: default avatarYuri Tikhonov <yur@emcraft.com>
      7356326f
  22. 29 Jan, 2015 1 commit
  23. 24 Jan, 2015 1 commit
  24. 20 Jan, 2015 1 commit
    • Vladimir Skvortsov's avatar
      RT: 106081 · 8dd40f2e
      Vladimir Skvortsov authored
      - Validate NOR flash, SDRAM and networking support in STM32F7 U-Boot.
      8dd40f2e
  25. 10 Jan, 2015 1 commit
  26. 17 Sep, 2014 1 commit
  27. 10 Sep, 2014 1 commit
  28. 25 Jul, 2014 1 commit
  29. 25 Dec, 2013 1 commit
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  31. 22 Dec, 2013 1 commit
  32. 17 Dec, 2013 2 commits
  33. 05 Dec, 2013 1 commit
  34. 11 Nov, 2013 1 commit
    • Pavel Boldin's avatar
      RT #90499: STM32F4X9-SOM NOR/SDRAM errata 2.8.7 fix · 427d84f4
      Pavel Boldin authored
      Copy image from NOR to SDRAM through On-Chip RAM buffer
      setting SDRAM to Self-Refresh on each copy.
      
      Implement flash_read16, flash_write16 and flash_write_buffer
      to disable/enable SDRAM on flash access.
      
      Start and immediately put SDRAM in self-refresh on start-up for flash
      to work correctly.
      427d84f4
  35. 31 Oct, 2013 1 commit
  36. 21 Oct, 2013 1 commit
  37. 10 Oct, 2013 1 commit